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MC33172 MC35172
Low power dual bipolar operational amplifiers
Features

Good consumption/speed ratio: only 200 A for 2.1 MHz, 2 V/s Single (or dual) supply operation from +4 V to +44 V (2 V to 22V) Wide input common mode mode voltage range including VCCLow level output voltage close to VCC- : 100 mV typical Pin-to-pin compatible with standard dual operational amplifiers N DIP8 (Plastic package)
Description
The MC3x172 series are dual bipolar operational amplifiers offering both low consumption (200 A/Amp) and good speed (2.1 MHz, 2 V/s). Moreover, the input common mode range extends down to the lower supply rail, allowing single supply operation from +4 V to +44 V.
Output 1 1
+ +
D SO-8 (Plastic micropackage)
8 7 6 5
VCC
Ouptut Inverting Input 2 Non-inverting Input 2
Inverting Input 1 2 Non-inverting Input 1 3 4
VCC
Pin connections (top view)
July 2008
Rev 2
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Circuit schematics
MC33172 MC35172
1
Circuit schematics
Figure 1. Typical schematic diagram (1/2 MC33172/MC35172)
VCC +
R4
R5
R6
T7 T1
T8
T9 R7 R3 T15
T10 R8
T11
T12
T13
T25 T16 T17 R13
Input +
T24 T26
T6
Input -
T14 C T5 T2 T13 T21 T22
R12 R14
Output
T19 T3 T4 R2 R1 R9 R10 R11 T20
T27 T29 T23 R15
T28
T30
T31
VCC -
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MC33172 MC35172
Absolute maximum ratings and operating conditions
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Absolute maximum ratings and operating conditions
Table 1.
Symbol VCC Vid Vin Supply voltage Differential input voltage Input voltage Output short-circuit duration Toper Operating free-air temperature range MC33172 MC35172 Thermal resistance junction to ambient(2) SO-8 DIP8 Thermal resistance junction to case(2) SO-8 DIP8 Junction temperature Storage temperature HBM: human body ESD model(3)
(4)
Absolute maximum ratings (AMR)
Parameter Value 22 see note
(1)
Unit V V V s C
see note 1 Indefinite -40 to 105 -55 to 125 125 85 40 41 150 -65 to 150 2 200 1 Class A
Rthja
C/W
Rthjc Tj Tstg
C/W C C kV V kV
MM: machine model
CDM: charged device model(5) Latch-up immunity
1. Either or both input voltages must not exceed the magnitude of VCC.
2. Short-circuits can cause excessive heating and destructive dissipation. Values are typical. 3. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 4. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. 5. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins.
Table 2.
Symbol VCC
Operating conditions
Parameter Supply voltage Value 2 to 22 Unit V
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Electrical characteristics
MC33172 MC35172
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Table 3.
Symbol
Electrical characteristics
VCC+ = +15V, VCC- = -15V, RL connected to Ground, Tamb = 25C (unless otherwise specified)
Parameter Input offset voltage VCC+ = +15V, VCC- = -15V, Vic = 0V VCC+ = 5V, VCC- = 0V, Vic = 0V, Vo = 1.4V VCC+ = +15V, VCC- = -15V, Vic = 0V, Tmin Tamb Tmax Input offset voltage drift Input offset current (Vic = 0V) Tmin Tamb Tmax Input bias current (Vic = 0V) Tmin Tamb Tmax Large signal voltage gain (RL = 10k Vo = 10V) , Tmin Tamb Tmax High level output voltage VCC+= 5V, VCC-= 0V, RL = 10k VCC+= +15V, VCC = -15V, RL= 10k , VCC+= +15V, VCC-= -15V, RL= 10k Tmin Tamb Tmax Low level output voltage VCC+= 5V, VCC-= 0V, RL= 10k VCC+= +15V, VCC-= -15V, RL= 10k , VCC+= +15V, VCC-= -15V, RL= 10k Tmin Tamb Tmax Output short-circuit current (Vid = 1V, Vo = 0V) Source Sink Input common mode voltage range Tmin Tamb Tmax Common-mode rejection ratio (Vic = Vicm-min) Supply voltage rejection ratio (VCC = 5 to 15V) Supply current VCC+ = 5V, VCC- = 0V, no load VCC+ = +15V, VCC- = -15V, no load VCC+ = +15V, VCC- = -15V no load, Tmin Tamb Tmax Slew rate (Vin = 10V, RL = 10k CL = 100pF) , Gain bandwidth product , RL = 10k CL = 100pF, F= 100kHz Phase margin (RL = 10k CL = 100pF) , Equivalent input noise voltage (F = 1kHz) Total harmonic distortion 1.6 1.4 3 15 VCC- to VCC+ - 1.8) VCC- to (VCC+ - 2.2) 80 80 100 100 200 220 2 2.1 45 29 0.05 120 250 250 300 50 25 3.5 13.6 13.3 Min. Typ. Max. Unit
Vio
1 1 10 5 20 100
4.5 5 6.5
mV
DVio Iio Iib Avd
V/C 20 40 100 200 nA nA V/mV
VOH
4.2 14.2
V
VOL
0.1 -14
0.15 -13.6 -13.3
V
Isc
6 27
mA
Vicm CMR SVR
V dB dB
ICC
A
SR GBP m en THD
V/s MHz Degrees
nV ----------Hz
% dB
VO1/VO2 Channel separation
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Package information
4
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com.
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Package information
MC33172 MC35172
4.1
DIP8 package information
Figure 2. DIP8 package mechanical drawing
Table 4.
DIP8 package mechanical data
Dimensions
Ref. Min. A A1 A2 b b2 c D E E1 e eA eB L 2.92 0.38 2.92 0.36 1.14 0.20 9.02 7.62 6.10
Millimeters Typ. Max. 5.33 0.015 3.30 0.46 1.52 0.25 9.27 7.87 6.35 2.54 7.62 10.92 3.30 3.81 0.115 4.95 0.56 1.78 0.36 10.16 8.26 7.11 0.115 0.014 0.045 0.008 0.355 0.300 0.240 Min.
Inches Typ. Max. 0.210
0.130 0.018 0.060 0.010 0.365 0.310 0.250 0.100 0.300
0.195 0.022 0.070 0.014 0.400 0.325 0.280
0.430 0.130 0.150
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MC33172 MC35172
Package information
4.2
SO-8 package information
Figure 3. SO-8 package mechanical drawing
Table 5.
SO-8 package mechanical data
Dimensions
Ref. Min. A A1 A2 b c D E E1 e h L k ccc 0.25 0.40 1 0.10 1.25 0.28 0.17 4.80 5.80 3.80
Millimeters Typ. Max. 1.75 0.25 0.004 0.049 0.48 0.23 4.90 6.00 3.90 1.27 0.50 1.27 8 0.10 0.010 0.016 1 5.00 6.20 4.00 0.011 0.007 0.189 0.228 0.150 Min.
Inches Typ. Max. 0.069 0.010
0.019 0.010 0.193 0.236 0.154 0.050 0.020 0.050 8 0.004 0.197 0.244 0.157
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Ordering information
MC33172 MC35172
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Ordering information
Table 6. Order codes
Temperature range Package DIP8 -40C, +105C SO-8 DIP8 -55C, +125C SO-8 Packing Tape Tape or Tape & reel Tape Tape or Tape & reel Marking MC33172N 33172 MC35172N 35172
Order code MC33172N MC33172D MC33172DT MC35172N MC35172D MC35172DT
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Revision history
Table 7.
Date 24-Nov-2001 01-Jul-2008
Document revision history
Revision 1 2 Initial release. ESD values and latch-up immunity added in Table 1: Absolute maximum ratings (AMR). Changes
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MC33172 MC35172
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